Servicios Personalizados
Revista
Articulo
Links relacionados
Compartir
CLEI Electronic Journal
versión On-line ISSN 0717-5000
Resumen
STOTZER, Eric J. y LEISS, Ernst L. Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor. CLEIej [online]. 2012, vol.15, n.2, pp.2-2. ISSN 0717-5000.
Abstract Code size is a primary concern in the embedded computing community. Minimizing physical memory requirements reduces total system cost and improves performance and power efficiency. VLIW processors rely on the compiler to statically encode the ILP in the program before its execution, and because of this, code size is larger relative to other processors. In this paper we describe the co-design of compiler optimizations and processor architecture features that have progressively reduced code size across three generations of a VLIW processor
Palabras clave : Instruction level parallelism; code compression; VLIW; ILP.